Quick Facts
| Detail | Information |
| Company Name | Quadric (quadric.io) |
| Founded | 2016 |
| Headquarters | Burlingame, California, USA |
| Founders | Veerbhan Kheterpal, Daniel Firu, Nigel Drego |
| Founder Background | MIT and Carnegie Mellon University; previously co-founded Bitcoin computing company 21 |
| Core Product | Chimera™ General Purpose Neural Processing Unit (GPNPU) |
| Business Model | Semiconductor IP licensing |
| Total Funding | Approximately $47 million (Series A + Series B + 2026 round) |
| Key Customers | MegaChips, Kyocera, DENSO |
| Target Markets | Automotive, edge servers, office automation, industrial AI, IoT |
| Key Technology | Unified C++ programmable processor running ML inference + DSP + control code |
| Scalability | 1 to 64 TOPs depending on configuration |
Introduction: The Chip Problem Nobody Was Talking About
Here is a question worth sitting with for a moment. When an AI model runs on your phone, in your car, or inside an industrial machine at a factory floor — who made the chip that actually does that work?
Most people know the big names. Nvidia dominates AI training in data centers. Apple designs its own Neural Engine for iPhones. Qualcomm handles mobile AI with its Snapdragon platform. But there is an enormous and growing category of AI applications that none of those solutions serve particularly well: the messy, real-world, on-device edge cases where a chip needs to run a neural network and do conventional signal processing simultaneously, in a small form factor, at low power, without a cloud connection.
That gap is exactly where Quadric.io has planted its flag. And the way this small California startup chose to address it — through a single, unified, fully programmable processor that eliminates the need to combine separate neural network accelerators with traditional signal processors — represents a genuinely different way of thinking about AI hardware.
This article explains what Quadric does, why its approach matters, how its flagship Chimera architecture works, who is using it, and where the company is heading.
See also “Athletifreak Founder: The Story Behind the Brand That Turned “Freak” Into a Badge of Honor“
The Problem Quadric Was Built to Solve
To understand why Quadric exists, you need to understand the frustrating reality that chip designers face when they try to add AI capability to a real-world device.
Most neural network accelerators — the specialized chips built to run machine learning inference — are very good at one specific thing: executing the mathematical operations that power modern neural networks. Matrix multiplications, convolutions, activation functions. These operations are at the heart of everything from image recognition to voice commands to predictive maintenance systems.
But a real-world AI application is never just a neural network running in isolation. It is a neural network working alongside traditional signal processing code, control algorithms, sensor fusion logic, and other classical computational tasks. An automotive vision system does not just run a neural network on camera frames — it also needs to process sensor data, apply filter algorithms, handle real-time control responses, and coordinate across multiple compute paths simultaneously.
The industry’s conventional answer to this problem is to use multiple processors: a dedicated neural network accelerator for the AI workload, a separate digital signal processor (DSP) for conventional signal processing, and sometimes additional microcontroller cores for system control. These components need to share data, stay synchronized, and be managed by software that understands how to orchestrate work across all of them.
The consequences of that approach are significant. It consumes more power. It takes up more physical space on a chip. It demands more complex software development. It creates data movement overhead every time information passes between processors. And it requires development teams to manage multiple toolchains and programming environments simultaneously.
Quadric’s founders — who came out of MIT and Carnegie Mellon and had previously co-founded a Bitcoin computing company called 21 — identified this as the central friction point in edge AI development. Their solution was not to build a better neural network accelerator. It was to build a single processor architecture that handles everything.

The Chimera Architecture: What Makes It Different
The centerpiece of Quadric’s technology is the Chimera™ GPNPU — General Purpose Neural Processing Unit. The name itself signals the intent: this is not a narrow accelerator. It is a general-purpose processor that happens to be exceptionally well-suited to neural network workloads.
The defining characteristic of Chimera is that it is fully programmable in standard C++. This matters enormously in practice. Every other neural network processing solution on the market requires developers to work within the specific framework that the hardware vendor supports. Operations not explicitly supported by the hardware cannot be executed natively — they overflow to a separate processor, which reintroduces the multi-chip complexity that Chimera is designed to eliminate.
Because Chimera runs standard C++ code, it can execute any operation a developer can write — including emerging neural network operations that did not exist when the chip was designed, novel signal processing algorithms specific to a particular application, proprietary control logic that a customer wants to keep entirely on the chip, and combinations of all of the above within a single execution pipeline.
The architecture unifies three types of computation that normally live on separate processors: scalar operations (standard sequential computation), vector operations (parallel data processing, the domain of traditional DSPs), and matrix operations (the high-throughput parallel computation at the core of neural network inference). In Chimera, all three execute within the same processor, using the same memory, under the same software framework.
The practical result is that a developer working with Chimera can write a single C++ application that mixes neural network inference code with classical signal processing routines and control algorithms, compile it with a standard LLVM-based toolchain, and run the entire application on one processor without managing data transfers between multiple chips.
The Chimera family scales from configurations delivering 1 TOPS (Tera Operations Per Second) for low-power sensor applications up to 64 TOPS for demanding automotive and edge server workloads. Semiconductor companies licensing the Chimera IP can select the configuration appropriate for their application’s performance and power envelope requirements.
From Chip to IP: The Pivot That Defined the Business
Quadric’s story has an interesting inflection point that is worth understanding. The company did not start as a semiconductor IP licensor. It started building its own chips.
The q16 processor, announced in 2021, was Quadric’s first silicon product. Built on the company’s novel architecture combining data-flow and Von Neumann computing principles, and featuring a 16×16 array of proprietary processing cores called Vortex cores, the q16 was positioned as Quadric’s demonstration that its architecture could be realized in real silicon. Samples were made available to developers through an M.2 form factor developer kit.
The q16 proved the architecture worked. But it also revealed the practical reality of the semiconductor business: manufacturing and selling finished chips requires enormous capital, long sales cycles, complex supply chain management, and competing directly with well-funded incumbents. For a startup with limited resources, that is a difficult path.
In May 2022, Quadric made a strategic shift that would define its business model going forward. Rather than competing as a chip manufacturer, the company repositioned itself as a semiconductor IP licensor — the same model used by Arm Holdings, the British company whose processor designs power the vast majority of the world’s smartphones without Arm manufacturing a single chip.
Under the IP licensing model, Quadric licenses the Chimera architecture to semiconductor companies who integrate it into their own custom system-on-chip (SoC) designs. The licensee handles manufacturing, integration, and product commercialization. Quadric provides the processor IP, the software development tools, the compiler, and the technical support to make integration successful.
This model aligns Quadric’s incentives with customer success, scales without requiring massive capital investment in manufacturing infrastructure, and allows the Chimera architecture to reach far more end applications than any single chip product line could address.
Key Partnerships and Design Wins
The IP licensing pivot produced a series of commercial relationships that validated both the technology and the business approach.
MegaChips was among the earliest major licensees. The Japanese ASIC and SoC services company announced a strategic partnership with Quadric in May 2022, committing to building customer chips based on the Chimera architecture. MegaChips serves a wide range of industrial and consumer electronics customers in Japan and globally, giving Quadric’s technology access to markets and customer relationships that would take years to build independently.
DENSO, the Japanese automotive supplier and Toyota subsidiary, backed Quadric with investment specifically for edge processing applications in automotive systems. Automotive is one of the most demanding markets for edge AI — vehicles need AI systems that work reliably in real-time, at varying temperatures, across the full range of driving scenarios, without depending on connectivity. The DENSO relationship opened the automotive design win pipeline for Chimera-based SoCs.
Kyocera Document Solutions licensed the Chimera IP for next-generation office automation systems. Kyocera cited the need for flexible, high-performance AI processing in document preparation and printing equipment — a use case that illustrates the breadth of applications where Chimera’s combination of neural network inference and general-purpose programmability is valuable.
In January 2026, Quadric announced the completion of a new funding round to support expanded customer deployments of the Chimera platform, pursue new design wins in automotive and edge server markets, and accelerate large language model inference at the edge — a capability that has become significantly more commercially relevant as LLMs have moved from data center curiosities to embedded application components.

The Founders and Team
Quadric was co-founded by Veerbhan Kheterpal, who serves as CEO, alongside Daniel Firu and Nigel Drego. All three had technical backgrounds from MIT and Carnegie Mellon, and had previously been technical co-founders at 21 — a Bitcoin computing startup that was at one point one of the best-funded companies in the cryptocurrency space.
The move from Bitcoin computing hardware to edge AI processing hardware might look like a sharp pivot, but it follows a logical technical thread. Both domains involve designing purpose-built compute architectures for specific high-volume computational workloads, optimizing performance-per-watt, and building the software infrastructure that makes novel hardware accessible to developers.
In May 2022, Quadric brought in Steve Roddy as Chief Marketing Officer. Roddy brought over three decades of semiconductor marketing experience, including a significant tenure as a Vice President at Arm’s machine learning group. His appointment at the moment Quadric was launching its IP licensing business was a clear signal that the company was serious about building a commercial organization capable of competing in the enterprise semiconductor IP market.
Why Edge AI Needs What Quadric Is Building
The broader context for Quadric’s work is the ongoing migration of AI computation from cloud data centers to the devices and systems where data is actually generated and decisions actually need to be made.
Running AI in the cloud made sense when AI applications were primarily research-oriented, when inference latency of hundreds of milliseconds was acceptable, and when the devices at the edge were not powerful enough to run useful models locally. All three of those conditions have changed significantly.
Modern edge applications — autonomous vehicles, industrial robotics, smart cameras, medical devices, consumer electronics — need AI responses measured in milliseconds, not seconds. They generate far more data than it is practical or economical to transmit to the cloud. And they often operate in environments where connectivity cannot be guaranteed.
These requirements drive the demand for capable, efficient, flexible AI processing at the edge. But flexible is the critical word. An autonomous vehicle does not know in advance every edge case it will encounter. An industrial monitoring system needs to adapt to changing process conditions. A smart camera system needs to integrate new detection capabilities as they become available.
Quadric’s argument — embodied in the Chimera architecture — is that flexibility at the edge requires genuine programmability, not just a wider menu of pre-defined operations. A fully C++ programmable GPNPU that can run any code the developer writes is fundamentally more adaptable than even the most sophisticated fixed-function neural network accelerator.
Financial Position and Funding
Quadric’s total disclosed funding across multiple rounds amounts to approximately $47 million, including a Series B round completed in December 2022 and an additional funding announcement in January 2026. The company is privately held and does not disclose specific revenue figures.
The funding trajectory reflects a company that has successfully moved from proof-of-concept through commercial product and into a period of customer deployment expansion. The January 2026 round specifically named automotive and edge-server LLM markets as priorities, indicating that Quadric’s customer pipeline has grown sophisticated enough to require capital for execution rather than for technology development.
For context, Quadric operates in a semiconductor IP market that also includes much larger incumbents — Arm, MIPS, Cadence, Synopsys — with decades of relationships and enormous installed bases. Quadric’s competitive advantage lies not in competing across the full breadth of processor IP, but in owning a specific and growing category: the unified GPNPU that no one else has brought to market with comparable programmability and scalability.
See also “Athletifreak Founder: The Story Behind the Brand That Turned “Freak” Into a Badge of Honor“
Final Words
Quadric.io has done something genuinely difficult in the semiconductor industry: it identified a real and growing problem that existing solutions were not solving, built a technically credible answer to that problem, survived the practical challenges of early-stage chip commercialization, and pivoted intelligently to a business model that allows its technology to reach far more customers than direct chip sales ever could.
The Chimera GPNPU sits at an interesting intersection of forces that are all moving in the same direction — more AI at the edge, more demand for real-time inference without cloud dependency, more applications requiring the combination of neural network processing with conventional computing — and Quadric’s architecture is designed specifically for that intersection.
Whether Quadric ultimately becomes the Arm of edge AI, a strategic acquisition target for a larger semiconductor company, or simply a durable specialist in its category remains to be seen. What is already clear is that the problem it chose to solve is real, its technical approach to solving it is differentiated, and the commercial traction it has built with partners like MegaChips, Kyocera, and DENSO demonstrates that the market agrees.
FAQs
1. What is Quadric.io?
Quadric.io is a semiconductor intellectual property company based in Burlingame, California, that licenses the Chimera family of General Purpose Neural Processing Units (GPNPUs). Its technology enables chip designers to integrate AI inference, signal processing, and control algorithms into a single programmable processor core within their custom SoC designs.
2. What problem does Quadric’s technology solve?
Most edge AI applications require both neural network inference and conventional signal processing or control code to run simultaneously. Traditional approaches use separate specialized processors for each function, creating power, space, cost, and software complexity overhead. Quadric’s Chimera GPNPU handles all of these workloads in a single unified processor, eliminating the need for multiple separate chips.
3. What is a GPNPU?
GPNPU stands for General Purpose Neural Processing Unit. It is a category of processor that Quadric effectively created — combining the high-throughput parallel processing of a neural network accelerator with the full programmability of a general-purpose processor and the signal processing capabilities of a DSP, all in one architecture.
4. What is the Chimera processor?
Chimera is Quadric’s flagship GPNPU IP core. It is fully programmable in standard C++, executes scalar, vector, and matrix computations in a unified pipeline, and scales from 1 to 64 TOPs depending on configuration. It runs both neural network inference workloads and conventional DSP and control code without requiring a separate processor.
5. Who founded Quadric?
Quadric was co-founded by Veerbhan Kheterpal (CEO), Daniel Firu, and Nigel Drego. All three have technical backgrounds from MIT and Carnegie Mellon and were previously co-founders of 21, a Bitcoin computing company.
6. How does Quadric make money?
Quadric operates as a semiconductor IP licensor. Companies pay to license the Chimera processor architecture and integrate it into their own custom chip designs. Revenue comes from licensing fees and potentially royalties on chips shipped using Quadric’s IP, similar to how Arm Holdings generates revenue from processor IP licensing.
7. Who are Quadric’s main customers and partners?
Key licensees and partners include MegaChips (Japan-based ASIC and SoC services company), Kyocera Document Solutions (office automation systems), and DENSO (automotive systems, Toyota subsidiary). These relationships span automotive, industrial, and office electronics markets.
8. What markets does Quadric target?
Quadric’s primary target markets include automotive AI systems, edge server applications, industrial AI, office automation, IoT devices, and smart sensor systems. In 2026, the company specifically named automotive and edge-server LLM inference as priority growth areas.
9. How much funding has Quadric raised?
Quadric has raised approximately $47 million across multiple rounds, including a Series A, a Series B completed in December 2022, and an additional round announced in January 2026. The company is privately held.
10. What programming language does Chimera use?
Chimera is fully programmable in standard C++. This distinguishes it from most neural network accelerators that require proprietary frameworks or limit developers to pre-supported operations. Standard C++ programmability means developers can implement any algorithm, including novel neural network operations not supported by fixed-function accelerators.
11. How does Quadric’s approach compare to Arm’s?
Both Quadric and Arm license processor IP rather than manufacturing chips directly. Arm dominates the general-purpose mobile and embedded processor market with its CPU architecture. Quadric targets the specific and growing category of unified AI processing at the edge, where neural network inference and conventional computation need to run together on a single programmable processor.
12. What is the significance of Quadric’s LLM focus in 2026?
Large Language Model inference, previously confined to data center servers, is increasingly being pushed to edge devices for latency, privacy, and connectivity reasons. Quadric’s January 2026 funding specifically named edge-server LLM inference as a priority, signaling that the Chimera architecture’s combination of programmability and performance is being positioned for this rapidly growing application category.